1. Field of the Invention
The present invention relates to a semiconductor device and a method for manufacturing the same.
2. Description of the Related Art
FIGS. 1A to 1D show an example of a conventional process of manufacturing a wiring structure of a semiconductor device.
First an insulating film 2 is thermally oxidized and formed on a semiconductor substrate 1, and then an aluminum (Al) or an alloy 3 containing aluminum (Al) as the principal ingredient is formed on the insulating film 2 by sputtering (FIG. 1A).
The alloy 3 thus formed is patterned to have a predetermined shape through a well-known lithography process, thereby forming a first wiring layer 4 (FIG. 1B).
An interlayer insulating film 5 is deposited on the resultant structure, and then a via hole 6 is formed in the film 5 (FIG. 1C).
After that, a second wiring layer 7 formed of aluminum or an alloy containing aluminum as the principal ingredient, is formed on the interlayer insulating film 5, and connected to the first wiring layer 4 through the via hole 6 (FIG. 1D). Thus, a multilayer wiring layer of the first wiring layer 4 and second wiring layer 7 is formed.
However, the width of a wiring layer has recently become narrower in accordance with the progress of high degree of integration of semiconductor devices. For this reason, a conventional wiring layer containing aluminum nearly reaches its limitation in reliability of EM (electromigration) or the like.
Since high-speed operations of semiconductor devices cause a noticeable delay in signal transmission due to wiring resistance, it is desirable to decrease the wiring resistance further.
According to the conventional technique of assembling an LSI (Large Scale Integrated Circuit), a layer of Ag (silver) or Cu (copper) whose resistance is lower than that of aluminum can be formed. However, neither silver nor copper has been used for forming a wiring layer since they are difficult to etch.